menu 1
menu 2
menu 3
 



 



For Non-RoHS Packages, Please contact the factory for availability.

CODE   PACKAGE NOTES
P/N Standard plastic DIP 1, 2, 3
P/N - SD Skinny DIP option 1, 2, 3
P/N - S Standard SOIC 1, 2, 3,4
P/N - SW  Widebody SOIC option 1, 2, 3, 4
P/N - S14 14-pin SOIC version of 8-pin part 1, 2, 3, 4
P/N - C Ceramic DIP option 1, 2, 3, 5
P/N - CM Ceramic Military DIP Option 1, 2, 3, 6
P/N - TS TSSOP 1, 2, 3, 4
P/N - TS24 24-pin TSSOP version of 20-pin part 1, 2, 3, 4


Example: LS7260-TS = the LS7260 in the TSSOP package

Note 1:   See Table 1 for package body widths
Note 2:   Package outline drawings conform to JEDEC standards
Note 3:   Packages shipped in anti-static tubes
Note 4:   Tape and Reel option is available. Contact factory for details
Note 5:   Includes Mil-Std 883E Class B visual per Method 2014,  plus
fine and gross leak testing per Method 1014
Note 6:   Includes all testing per Note 5 plus HTRB Burn-In at 125°C
for 168 hours per Mil-Std 883E Class B, Method 1015.

ADDITIONAL ORDERING OPTIONS:
Probed Wafers (P/N-PW), Waffle Packed Die (P/N-WP) and RoHS Compliant (LFP/N).

Table 1.  Package Body Width (mils)
Note: All packages conform to JEDEC Standards
# of Pins
P/N, -C, -CM
-SD
-S
-SW
-TS
8
300
-
150
-
-
14
300
-
150
-
173
16
300
-
150
300
-
18
300
-
300
-
-
20
300
-
300
-
173
24
600
300
300
-
173
28
600
300
300
-
173
38
-
-
-
-
173
40
600
-
-
-
-
48
-
-
-
-
240

Return to Top


DIP Outline Drawing
SOIC Outline Drawing
TSSOP Outline Drawing

Contact Factory for details.

Return to Top